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Leak Reveals 128 Core Zen 5 & 192 Core Zen 5C Flavors

by Contributor

AMD’s next-generation EPYC Turin CPUs featuring Zen 5 and Zen 5C architecture in 128-core & 192-core configurations have been leaked.

AMD 5th Gen EPYC Turin CPUs Leak Out: Die Configurations Detailed With Up To 128 Core Zen 5 & 192 Core Zen 5C Configurations

The latest leak comes from YuuKi_AnS who has not only leaked the first engineering samples of the next-gen AMD EPYC Turin CPUs but also showcased the die configurations that we can expect with these high-performance server chips.

Starting with the details, the AMD EPYC Turin will be the 5th Gen EPYC lineup that replaces the 4th Gen EPYC family. The 4th Gen EPYC family is comprised of Genoa, Genoa-X, Bergamo & Siena CPUs which make use of Zen 4 & Zen 4C cores in EPYC 9004/8004 SKUs. The 5th Gen EPYC family will be similar, featuring a range of configurations and SKUs with Zen 5 “Nirvana” & Zen 5C “Prometheus” cores.

amd-5th-gen-epyc-turin-cpus-zen-5-and-zen-5c-cores-leak-_2

Based on the images leaked, we are looking at a AMD EPYC “Turin” ES2 chip with a 100-000001245-07 OPN code. This chip was made in 2023 and looks to be very recent. The carrier bracket for AMD Zen 5 Turin-Classic chips seems to be light blue and these chips should retain socket compatibility with the SP5 platform which is designed for the high-end chips. It currently features support for the aforementioned EPYC 9004 lineup.

It should be pointed out that a few months back, the same OPN code was mentioned by Ditto_55. The user also listed various other configurations for the AMD EPYC Turin (internally codenamed as Breithorn) CPU family which include:

  • 100-000001245 – 16 CCD + 1 IOD (128 Zen 5 Core / 256 Thread / 512 MB Cache)
  • 100-000001341 – 12 CCD + 1 IOD (96 Zen 5 Cores / 192 Threads / 384 MB Cache)
  • 100-000001247 – 8 CCD + 1 IOD (64 Zen 5 Cores / 128 Threads / 256 MB Cache)
  • 100-000001342 – 8 CCD + 1 IOD (64 Zen 5 Cores / 128 Threads / 256 MB Cache)
  • 100-000001249 – 2 CCD + 1 IOD (32 Zen 5C Cores / 64 Threads / 64 MB Cache)

AMD 5th Gen EPYC Turin CPUs With Zen 5 Classic Architecture – Up To 128 Cores

Starting with the configurations, the AMD EPYC Turin CPUs with Zen 5 Classic cores will offer up to 128 cores and 256 threads.  There will be a maximum of 16 CCDs with 8 cores each, and each CCD will come with its own 32 MB of L3 cache. This will form up to 512 MB of L3 cache.

Image Source: YuuKi_AnS

The IOD will feature a DDR5 integrated memory controller with support for 6000 MT/s speeds, and a PCIe Gen5 (CXL 2.0), Gen3 Infinity Fabric, and Secure Processor support amongst a list of other controllers and accelerators.

AMD 5th Gen EPYC Turin CPUs With Zen 5C Dense Architecture – Up To 192 Cores

The AMD EPYC Turin CPU featuring the Zen 5C cores is where things get crazy with each Zen 5C CCD offering up to 16 cores and 32 MB of L3 cache. There will be six compute chiplets onboard these chips for a total of 192 cores and 256 threads with a slightly reduced 384 MB of L3 cache. The CPUs will retain the same I/O as the other classic chips.

Image Source: YuuKi_AnS

AMD has so far confirmed that the EPYC Turin CPUs based on the Zen 5 core architecture are on track for launch in 2024 and will deliver a significant jump in performance per watt. The added core counts and improved architecture should help AMD deliver a strong and competitive solution against Intel’s Granite Rapids Xeon chips which are also expected to launch in the coming year.

AMD EPYC CPU Families:

Family Name AMD EPYC Venice AMD EPYC Turin-Dense AMD EPYC Turin-X AMD EPYC Turin AMD EPYC Siena AMD EPYC Bergamo AMD EPYC Genoa-X AMD EPYC Genoa AMD EPYC Milan-X AMD EPYC Milan AMD EPYC Rome AMD EPYC Naples
Family Branding EPYC 11K? EPYC 10K? EPYC 10K? EPYC 10K? EPYC 8004 EPYC 9004 EPYC 9004 EPYC 9004 EPYC 7004 EPYC 7003 EPYC 7002 EPYC 7001
Family Launch 2025+ 2025? 2025? 2024 2023 2023 2023 2022 2022 2021 2019 2017
CPU Architecture Zen 6? Zen 5C Zen 5 Zen 5 Zen 4 Zen 4C Zen 4 V-Cache Zen 4 Zen 3 Zen 3 Zen 2 Zen 1
Process Node TBD 3nm TSMC? 4nm TSMC 4nm TSMC 5nm TSMC 4nm TSMC 5nm TSMC 5nm TSMC 7nm TSMC 7nm TSMC 7nm TSMC 14nm GloFo
Platform Name TBD SP5 SP5 SP5 SP6 SP5 SP5 SP5 SP3 SP3 SP3 SP3
Socket TBD LGA 6096 (SP5) LGA 6096 (SP5) LGA 6096 LGA 4844 LGA 6096 LGA 6096 LGA 6096 LGA 4094 LGA 4094 LGA 4094 LGA 4094
Max Core Count 384? 192 128 128 64 128 96 96 64 64 64 32
Max Thread Count 768? 384 256 256 128 256 192 192 128 128 128 64
Max L3 Cache TBD 384 MB 1536 MB 384 MB 256 MB 256 MB 1152 MB 384 MB 768 MB 256 MB 256 MB 64 MB
Chiplet Design TBD 12 CCD’s (1CCX per CCD) + 1 IOD 16 CCD’s (1CCX per CCD) + 1 IOD 16 CCD’s (1CCX per CCD) + 1 IOD 8 CCD’s (1CCX per CCD) + 1 IOD 12 CCD’s (1 CCX per CCD) + 1 IOD 12 CCD’s (1 CCX per CCD) + 1 IOD 12 CCD’s (1 CCX per CCD) + 1 IOD 8 CCD’s (1 CCX per CCD) + 1 IOD 8 CCD’s (1 CCX per CCD) + 1 IOD 8 CCD’s (2 CCX’s per CCD) + 1 IOD 4 CCD’s (2 CCX’s per CCD)
Memory Support TBD DDR5-6000? DDR5-6000? DDR5-6000? DDR5-5200 DDR5-5600 DDR5-4800 DDR5-4800 DDR4-3200 DDR4-3200 DDR4-3200 DDR4-2666
Memory Channels TBD 12 Channel (SP5) 12 Channel (SP5) 12 Channel 6-Channel 12 Channel 12 Channel 12 Channel 8 Channel 8 Channel 8 Channel 8 Channel
PCIe Gen Support TBD TBD TBD TBD 96 Gen 5 128 Gen 5 128 Gen 5 128 Gen 5 128 Gen 4 128 Gen 4 128 Gen 4 64 Gen 3
TDP (Max) TBD 480W (cTDP 600W) 480W (cTDP 600W) 480W (cTDP 600W) 70-225W 320W (cTDP 400W) 400W 400W 280W 280W 280W 200W

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